1. Field of the Invention
The present invention relates to power supply rejection, and more particularly to active power supply rejection using negative current generation loop feedback to reduce power supply noise injected into the signal path of amplifiers, filters, reference circuits and the like.
2. Description of the Related Art
The performance and function of many electronic circuits, including amplifiers (particularly open-loop amplifiers), filters, reference circuits, etc., are affected by the stability of the voltage of the power supply. The measure of performance is known as the power supply rejection (PSR). There is an increasing demand to have high rejection of power supply noise in analog and/or digital systems, particularly in communication applications.
Many analog and/or digital applications employ a P-channel metal-oxide semiconductor (PMOS) common gate (CG) amplifier for buffering or amplifying a signal. In this configuration, PMOS current source transistors provide the primary paths for coupling power supply noise to the signal. When biased using a diode-connected mirror transistor and a current source with adequate output resistance, the gate voltage of the PMOS current source transistor tracks the power supply noise. Hence, the power supply noise coupling occurs predominantly through source/bulk voltage fluctuations. The current follows the output conductance “gds” and the bulk-to-drain capacitance (Cbd) and gate-to-drain capacitance (Cgd) paths.
It is desired to counteract power supply noise to improve power supply rejection.